Skyworks Solutions Inc Si5326C-C-GM, PLL Frequency Multiplier 4 3.63 V 36-Pin QFN
Технически документи
Спецификации
Maximum Output Frequency
346MHz
Number of Elements per Chip
4
Mounting Type
Surface Mount
Minimum Output Frequency
2kHz
Package Type
QFN
Maximum Supply Current
279 mA
Pin Count
36
Maximum Input Frequency
710MHz
Dimensions
6 x 6 x 0.85mm
Height
0.85mm
Length
6mm
Maximum Operating Supply Voltage
3.63 V
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
2.97 V
Minimum Operating Temperature
-40 °C
Width
6mm
Страна на произход
Taiwan, Province Of China
Детайли за продукта
Si531x/2x/6x/7x Jitter Attenuators, Silicon Labs
The Silicon Labs Si531x/2x/6x/7x jitter attenuators generate any combination of output frequencies from any input frequency. Using the Silicon Labs third-generation DSPLL architecture they simplify your clock tree design by replacing multiple clocks and oscillators. Minimising your BOM count and complexity.
Информацията за складовите наличности временно не е налична.
Моля, проверете отново по-късно.
€ 39,24
Each (Supplied in a Tray) (ex VAT)
1
€ 39,24
Each (Supplied in a Tray) (ex VAT)
1
Купете в насипно състояние
количество | Единична цена |
---|---|
1 - 4 | € 39,24 |
5 - 9 | € 36,16 |
10 - 24 | € 35,23 |
25+ | € 34,37 |
Технически документи
Спецификации
Maximum Output Frequency
346MHz
Number of Elements per Chip
4
Mounting Type
Surface Mount
Minimum Output Frequency
2kHz
Package Type
QFN
Maximum Supply Current
279 mA
Pin Count
36
Maximum Input Frequency
710MHz
Dimensions
6 x 6 x 0.85mm
Height
0.85mm
Length
6mm
Maximum Operating Supply Voltage
3.63 V
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
2.97 V
Minimum Operating Temperature
-40 °C
Width
6mm
Страна на произход
Taiwan, Province Of China
Детайли за продукта
Si531x/2x/6x/7x Jitter Attenuators, Silicon Labs
The Silicon Labs Si531x/2x/6x/7x jitter attenuators generate any combination of output frequencies from any input frequency. Using the Silicon Labs third-generation DSPLL architecture they simplify your clock tree design by replacing multiple clocks and oscillators. Minimising your BOM count and complexity.