Технически документи
Спецификации
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
2.2 ns @ 3.3 V
Height
1.05mm
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
12.6mm
Maximum Operating Supply Voltage
3.6 V
Width
6.2mm
Minimum Operating Supply Voltage
1.2 V
Страна на произход
Thailand
Детайли за продукта
74LVCH Family
High Speed Low-Voltage CMOS Technology logic
Operating voltage 1.2 to 3.6V with 5V tolerant inputs/outputs
Bus Hold feature on inputs eliminates need for large pull-ups
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVCH Family
Информацията за складовите наличности временно не е налична.
Моля, проверете отново по-късно.
€ 0,95
Each (Supplied on a Reel) (ex VAT)
Производствен пакет (Ролка)
1
€ 0,95
Each (Supplied on a Reel) (ex VAT)
Производствен пакет (Ролка)
1
Технически документи
Спецификации
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
2.2 ns @ 3.3 V
Height
1.05mm
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
12.6mm
Maximum Operating Supply Voltage
3.6 V
Width
6.2mm
Minimum Operating Supply Voltage
1.2 V
Страна на произход
Thailand
Детайли за продукта
74LVCH Family
High Speed Low-Voltage CMOS Technology logic
Operating voltage 1.2 to 3.6V with 5V tolerant inputs/outputs
Bus Hold feature on inputs eliminates need for large pull-ups
Compatibility: Input LVTTL/TTL, Output LVCMOS