Microchip, 32bit PIC, PIC32MZ Microcontroller, 252MHz, 2 MB Flash, 144-Pin TQFP

Технически документи
Спецификации
Brand
MicrochipFamily Name
PIC32MZ
Package Type
TQFP
Mounting Type
Surface Mount
Pin Count
144
Device Core
PIC
Data Bus Width
32bit
Program Memory Size
2 MB
Maximum Frequency
252MHz
RAM Size
512 kB
USB Channels
1
Number of PWM Units
0
Number of SPI Channels
6
Typical Operating Supply Voltage
3.6 V
Number of I2C Channels
5
Number of USART Channels
0
Number of UART Channels
6
Number of CAN Channels
2
Pulse Width Modulation
0
Dimensions
16 x 16 x 1.05mm
Width
16mm
Number of PCI Channels
0
Height
1.05mm
Number of LIN Channels
1
Number of Ethernet Channels
1
Program Memory Type
Flash
Maximum Number of Ethernet Channels
1
ADCs
48 x 12 bit
Length
16mm
Number of ADC Units
1
Automotive Standard
AEC-Q100
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Instruction Set Architecture
RISC
€ 15,05
€ 15,05 Всеки (ex VAT)
Стандарт
1
€ 15,05
€ 15,05 Всеки (ex VAT)
Информацията за складовите наличности временно не е налична.
Стандарт
1
Информацията за складовите наличности временно не е налична.
| количество | Единична цена |
|---|---|
| 1 - 24 | € 15,05 |
| 25 - 99 | € 14,30 |
| 100+ | € 13,60 |
Технически документи
Спецификации
Brand
MicrochipFamily Name
PIC32MZ
Package Type
TQFP
Mounting Type
Surface Mount
Pin Count
144
Device Core
PIC
Data Bus Width
32bit
Program Memory Size
2 MB
Maximum Frequency
252MHz
RAM Size
512 kB
USB Channels
1
Number of PWM Units
0
Number of SPI Channels
6
Typical Operating Supply Voltage
3.6 V
Number of I2C Channels
5
Number of USART Channels
0
Number of UART Channels
6
Number of CAN Channels
2
Pulse Width Modulation
0
Dimensions
16 x 16 x 1.05mm
Width
16mm
Number of PCI Channels
0
Height
1.05mm
Number of LIN Channels
1
Number of Ethernet Channels
1
Program Memory Type
Flash
Maximum Number of Ethernet Channels
1
ADCs
48 x 12 bit
Length
16mm
Number of ADC Units
1
Automotive Standard
AEC-Q100
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Instruction Set Architecture
RISC

