Технически документи
Спецификации
Brand
NexperiaLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-74A
Pin Count
5
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7.5 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
3.1mm
Height
1mm
Width
1.7mm
Dimensions
3.1 x 1.7 x 1mm
Propagation Delay Test Condition
50pF
Детайли за продукта
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
€ 4,81
€ 0,048 Each (In a Pack of 100) (ex VAT)
Стандарт
100
€ 4,81
€ 0,048 Each (In a Pack of 100) (ex VAT)
Стандарт
100
Информацията за складовите наличности временно не е налична.
Моля, проверете отново по-късно.
количество | Единична цена | Per Опаковка |
---|---|---|
100 - 100 | € 0,048 | € 4,81 |
200 - 400 | € 0,039 | € 3,87 |
500 - 900 | € 0,038 | € 3,76 |
1000 - 1900 | € 0,036 | € 3,64 |
2000+ | € 0,036 | € 3,64 |
Технически документи
Спецификации
Brand
NexperiaLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-74A
Pin Count
5
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7.5 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
3.1mm
Height
1mm
Width
1.7mm
Dimensions
3.1 x 1.7 x 1mm
Propagation Delay Test Condition
50pF
Детайли за продукта
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS